Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-cbb.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-cbb.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-cbb.yaml
Extension
.yaml
Size
3390 bytes
Lines
98
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra194-cbb.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NVIDIA Tegra194 CBB 1.0

maintainers:
  - Sumit Gupta <sumitg@nvidia.com>

description: |+
  The Control Backbone (CBB) is comprised of the physical path from an
  initiator to a target's register configuration space. CBB 1.0 has
  multiple hierarchical sub-NOCs (Network-on-Chip) and connects various
  initiators and targets using different bridges like AXIP2P, AXI2APB.

  This driver handles errors due to illegal register accesses reported
  by the NOCs inside the CBB. NOCs reporting errors are cluster NOCs
  "AON-NOC, SCE-NOC, RCE-NOC, BPMP-NOC, CV-NOC" and "CBB Central NOC"
  which is the main NOC.

  By default, the access issuing initiator is informed about the error
  using SError or Data Abort exception unless the ERD (Error Response
  Disable) is enabled/set for that initiator. If the ERD is enabled, then
  SError or Data Abort is masked and the error is reported with interrupt.

  - For CCPLEX (CPU Complex) initiator, the driver sets ERD bit. So, the
    errors due to illegal accesses from CCPLEX are reported by interrupts.
    If ERD is not set, then error is reported by SError.
  - For other initiators, the ERD is disabled. So, the access issuing
    initiator is informed about the illegal access by Data Abort exception.
    In addition, an interrupt is also generated to CCPLEX. These initiators
    include all engines using Cortex-R5 (which is ARMv7 CPU cluster) and
    engines like TSEC (Security co-processor), NVDEC (NVIDIA Video Decoder
    engine) etc which can initiate transactions.

  The driver prints relevant debug information like Error Code, Error
  Description, Master, Address, AXI ID, Cache, Protection, Security Group
  etc on receiving error notification.

properties:
  $nodename:
    pattern: "^[a-z]+-noc@[0-9a-f]+$"

  compatible:
    enum:
      - nvidia,tegra194-cbb-noc
      - nvidia,tegra194-aon-noc
      - nvidia,tegra194-bpmp-noc
      - nvidia,tegra194-rce-noc
      - nvidia,tegra194-sce-noc

  reg:
    maxItems: 1

  interrupts:
    description:
      CCPLEX receives secure or nonsecure interrupt depending on error type.
      A secure interrupt is received for SEC(firewall) & SLV errors and a
      non-secure interrupt is received for TMO & DEC errors.
    items:
      - description: non-secure interrupt
      - description: secure interrupt

  nvidia,axi2apb:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      Specifies the node having all axi2apb bridges which need to be checked
      for any error logged in their status register.

Annotation

Implementation Notes