Documentation/devicetree/bindings/bus/st,stm32mp25-rifsc.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/bus/st,stm32mp25-rifsc.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/bus/st,stm32mp25-rifsc.yaml
Extension
.yaml
Size
3094 bytes
Lines
110
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/bus/st,stm32mp25-rifsc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: STM32 Resource isolation framework security controller

maintainers:
  - Gatien Chevallier <gatien.chevallier@foss.st.com>

description: |
  Resource isolation framework (RIF) is a comprehensive set of hardware blocks
  designed to enforce and manage isolation of STM32 hardware resources like
  memory and peripherals.

  The RIFSC (RIF security controller) is composed of three sets of registers,
  each managing a specific set of hardware resources:
    - RISC registers associated with RISUP logic (resource isolation device unit
      for peripherals), assign all non-RIF aware peripherals to zero, one or
      any security domains (secure, privilege, compartment).
    - RIMC registers: associated with RIMU logic (resource isolation master
      unit), assign all non RIF-aware bus master to one security domain by
      setting secure, privileged and compartment information on the system bus.
      Alternatively, the RISUP logic controlling the device port access to a
      peripheral can assign target bus attributes to this peripheral master port
      (supported attribute: CID).
    - RISC registers associated with RISAL logic (resource isolation device unit
      for address space - Lite version), assign address space subregions to one
      security domains (secure, privilege, compartment).

select:
  properties:
    compatible:
      contains:
        enum:
          - st,stm32mp21-rifsc
          - st,stm32mp25-rifsc
  required:
    - compatible

properties:
  compatible:
    items:
      - enum:
          - st,stm32mp21-rifsc
          - st,stm32mp25-rifsc
      - const: simple-bus

  reg:
    maxItems: 1

  "#address-cells":
    const: 1

  "#size-cells":
    enum: [ 1, 2 ]

  ranges: true

  "#access-controller-cells":
    const: 1
    description:
      Contains the firewall ID associated to the peripheral.

patternProperties:
  "@[0-9a-f]+$":
    description: Peripherals
    type: object

Annotation

Implementation Notes