Documentation/devicetree/bindings/bus/ti-sysc.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/bus/ti-sysc.yaml

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Linux kernel
Corpus path
Documentation/devicetree/bindings/bus/ti-sysc.yaml
Extension
.yaml
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6275 bytes
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216
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Support Tooling And Documentation
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Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
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atlas-only

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Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/bus/ti-sysc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Texas Instruments interconnect target module

maintainers:
  - Tony Lindgren <tony@atomide.com>

description:
  Texas Instruments SoCs can have a generic interconnect target module
  for devices connected to various interconnects such as L3 interconnect
  using Arteris NoC, and L4 interconnect using Sonics s3220. This module
  is mostly used for interaction between module and Power, Reset and Clock
  Manager PRCM. It participates in the OCP Disconnect Protocol, but other
  than that it is mostly independent of the interconnect.

  Each interconnect target module can have one or more devices connected to
  it. There is a set of control registers for managing the interconnect target
  module clocks, idle modes and interconnect level resets.

  The interconnect target module control registers are sprinkled into the
  unused register address space of the first child device IP block managed by
  the interconnect target module. Typically the register names are REVISION,
  SYSCONFIG and SYSSTATUS.

properties:
  $nodename:
    pattern: "^target-module(@[0-9a-f]+)?$"

  compatible:
    oneOf:
      - items:
          - enum:
              - ti,sysc-omap2
              - ti,sysc-omap4
              - ti,sysc-omap4-simple
              - ti,sysc-omap2-timer
              - ti,sysc-omap4-timer
              - ti,sysc-omap3430-sr
              - ti,sysc-omap3630-sr
              - ti,sysc-omap4-sr
              - ti,sysc-omap3-sham
              - ti,sysc-omap-aes
              - ti,sysc-mcasp
              - ti,sysc-dra7-mcasp
              - ti,sysc-usb-host-fs
              - ti,sysc-dra7-mcan
              - ti,sysc-pruss
          - const: ti,sysc
      - items:
          - const: ti,sysc

  reg:
    description:
      Interconnect target module control registers consisting of
      REVISION, SYSCONFIG and SYSSTATUS registers as defined in the
      Technical Reference Manual for the SoC.
    minItems: 1
    maxItems: 3

  reg-names:
    description:
      Interconnect target module control register names consisting
      of "rev", "sysc" and "syss".
    oneOf:
      - minItems: 1
        items:

Annotation

Implementation Notes