Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml
Extension
.yaml
Size
2128 bytes
Lines
104
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright (C) 2023 Renesas Electronics Corp.
%YAML 1.2
---
$id: http://devicetree.org/schemas/cache/andestech,ax45mp-cache.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Andestech AX45MP L2 Cache Controller

maintainers:
  - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

description:
  A level-2 cache (L2C) is used to improve the system performance by providing
  a large amount of cache line entries and reasonable access delays. The L2C
  is shared between cores, and a non-inclusive non-exclusive policy is used.

select:
  properties:
    compatible:
      contains:
        enum:
          - andestech,ax45mp-cache

  required:
    - compatible

properties:
  compatible:
    items:
      - enum:
          - andestech,qilai-ax45mp-cache
          - renesas,r9a07g043f-ax45mp-cache
      - const: andestech,ax45mp-cache
      - const: cache

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  cache-line-size:
    const: 64

  cache-level:
    const: 2

  cache-sets:
    enum: [1024, 2048]

  cache-size:
    enum: [131072, 262144, 524288, 1048576, 2097152]

  cache-unified: true

  next-level-cache: true

additionalProperties: false

required:
  - compatible
  - reg
  - interrupts
  - cache-line-size
  - cache-level
  - cache-sets
  - cache-size
  - cache-unified

Annotation

Implementation Notes