Documentation/devicetree/bindings/cache/starfive,jh8100-starlink-cache.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/cache/starfive,jh8100-starlink-cache.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/cache/starfive,jh8100-starlink-cache.yaml- Extension
.yaml- Size
- 1493 bytes
- Lines
- 67
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/cache/starfive,jh8100-starlink-cache.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: StarFive StarLink Cache Controller
maintainers:
- Joshua Yeong <joshua.yeong@starfivetech.com>
description:
StarFive's StarLink Cache Controller manages the L3 cache shared between
clusters of CPU cores. The cache driver enables RISC-V non-standard cache
management as an alternative to instructions in the RISC-V Zicbom extension.
allOf:
- $ref: /schemas/cache-controller.yaml#
# We need a select here so we don't match all nodes with 'cache'
select:
properties:
compatible:
contains:
enum:
- starfive,jh8100-starlink-cache
required:
- compatible
properties:
compatible:
items:
- const: starfive,jh8100-starlink-cache
- const: cache
reg:
maxItems: 1
unevaluatedProperties: false
required:
- compatible
- reg
- cache-block-size
- cache-level
- cache-sets
- cache-size
- cache-unified
examples:
- |
soc {
#address-cells = <2>;
#size-cells = <2>;
cache-controller@15000000 {
compatible = "starfive,jh8100-starlink-cache", "cache";
reg = <0x0 0x15000000 0x0 0x278>;
cache-block-size = <64>;
cache-level = <3>;
cache-sets = <8192>;
cache-size = <0x400000>;
cache-unified;
};
};
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.