Documentation/devicetree/bindings/clock/imx31-clock.yaml

File Facts

System

Linux kernel

Corpus path

Documentation/devicetree/bindings/clock/imx31-clock.yaml

Extension

.yaml

Size

3141 bytes

Lines

113

Domain

Support Tooling And Documentation

Bucket

Documentation

Inferred role

Support Tooling And Documentation: configuration, schema, or hardware description

Status

atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

• Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/imx31-clock.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Freescale i.MX31 Clock Controller

maintainers:
  - Fabio Estevam <festevam@gmail.com>

description: |
  The clock consumer should specify the desired clock by having the clock
  ID in its "clocks" phandle cell. The following is a full list of i.MX31
  clocks and IDs.

        Clock		    ID
        -----------------------
        dummy	             0
        ckih                 1
        ckil                 2
        mpll                 3
        spll                 4
        upll                 5
        mcu_main             6
        hsp                  7
        ahb                  8
        nfc                  9
        ipg                  10
        per_div              11
        per                  12
        csi_sel              13
        fir_sel              14
        csi_div              15
        usb_div_pre          16
        usb_div_post         17
        fir_div_pre          18
        fir_div_post         19
        sdhc1_gate           20
        sdhc2_gate           21
        gpt_gate             22
        epit1_gate           23
        epit2_gate           24
        iim_gate             25
        ata_gate             26
        sdma_gate            27
        cspi3_gate           28
        rng_gate             29
        uart1_gate           30
        uart2_gate           31
        ssi1_gate            32
        i2c1_gate            33
        i2c2_gate            34
        i2c3_gate            35
        hantro_gate          36
        mstick1_gate         37
        mstick2_gate         38
        csi_gate             39
        rtc_gate             40
        wdog_gate            41
        pwm_gate             42
        sim_gate             43
        ect_gate             44
        usb_gate             45
        kpp_gate             46
        ipu_gate             47
        uart3_gate           48
        uart4_gate           49
        uart5_gate           50
        owire_gate           51

Annotation

• Atlas domain: Support Tooling And Documentation / Documentation.
• Implementation status: atlas-only.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.