Documentation/devicetree/bindings/clock/imx35-clock.yaml

File Facts

System

Linux kernel

Corpus path

Documentation/devicetree/bindings/clock/imx35-clock.yaml

Extension

.yaml

Size

2764 bytes

Lines

132

Domain

Support Tooling And Documentation

Bucket

Documentation

Inferred role

Support Tooling And Documentation: configuration, schema, or hardware description

Status

atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

• Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/imx35-clock.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Freescale i.MX35 Clock Controller

maintainers:
  - Steffen Trumtrar <s.trumtrar@pengutronix.de>

description: |
  The clock consumer should specify the desired clock by having the clock
  ID in its "clocks" phandle cell. The following is a full list of i.MX35
  clocks and IDs.

        Clock			ID
        ---------------------------
        ckih			0
        mpll			1
        ppll			2
        mpll_075		3
        arm			4
        hsp			5
        hsp_div			6
        hsp_sel			7
        ahb			8
        ipg			9
        arm_per_div		10
        ahb_per_div		11
        ipg_per			12
        uart_sel		13
        uart_div		14
        esdhc_sel		15
        esdhc1_div		16
        esdhc2_div		17
        esdhc3_div		18
        spdif_sel		19
        spdif_div_pre		20
        spdif_div_post		21
        ssi_sel			22
        ssi1_div_pre		23
        ssi1_div_post		24
        ssi2_div_pre		25
        ssi2_div_post		26
        usb_sel			27
        usb_div			28
        nfc_div			29
        asrc_gate		30
        pata_gate		31
        audmux_gate		32
        can1_gate		33
        can2_gate		34
        cspi1_gate		35
        cspi2_gate		36
        ect_gate		37
        edio_gate		38
        emi_gate		39
        epit1_gate		40
        epit2_gate		41
        esai_gate		42
        esdhc1_gate		43
        esdhc2_gate		44
        esdhc3_gate		45
        fec_gate		46
        gpio1_gate		47
        gpio2_gate		48
        gpio3_gate		49
        gpt_gate		50
        i2c1_gate		51

Annotation

• Atlas domain: Support Tooling And Documentation / Documentation.
• Implementation status: atlas-only.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.