Documentation/devicetree/bindings/clock/marvell-armada-370-gating-clock.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/clock/marvell-armada-370-gating-clock.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/clock/marvell-armada-370-gating-clock.yaml- Extension
.yaml- Size
- 7523 bytes
- Lines
- 228
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
---
$id: http://devicetree.org/schemas/clock/marvell-armada-370-gating-clock.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Marvell EBU SoC gating-clock
maintainers:
- Andrew Lunn <andrew@lunn.ch>
- Gregory Clement <gregory.clement@bootlin.com>
description: >
Marvell Armada 370/375/380/385/39x/XP, Dove and Kirkwood allow some peripheral
clocks to be gated to save some power. The clock ID is directly mapped to the
corresponding clock gating control bit in HW to ease manual clock lookup in
datasheet.
The following is a list of provided IDs for Armada 370:
ID Clock Peripheral
-----------------------------------
0 Audio AC97 Cntrl
1 pex0_en PCIe 0 Clock out
2 pex1_en PCIe 1 Clock out
3 ge1 Gigabit Ethernet 1
4 ge0 Gigabit Ethernet 0
5 pex0 PCIe Cntrl 0
9 pex1 PCIe Cntrl 1
15 sata0 SATA Host 0
17 sdio SDHCI Host
23 crypto CESA (crypto engine)
25 tdm Time Division Mplx
28 ddr DDR Cntrl
30 sata1 SATA Host 0
The following is a list of provided IDs for Armada 375:
ID Clock Peripheral
-----------------------------------
2 mu Management Unit
3 pp Packet Processor
4 ptp PTP
5 pex0 PCIe 0 Clock out
6 pex1 PCIe 1 Clock out
8 audio Audio Cntrl
11 nd_clk Nand Flash Cntrl
14 sata0_link SATA 0 Link
15 sata0_core SATA 0 Core
16 usb3 USB3 Host
17 sdio SDHCI Host
18 usb USB Host
19 gop Gigabit Ethernet MAC
20 sata1_link SATA 1 Link
21 sata1_core SATA 1 Core
22 xor0 XOR DMA 0
23 xor1 XOR DMA 0
24 copro Coprocessor
25 tdm Time Division Mplx
28 crypto0_enc Cryptographic Unit Port 0 Encryption
29 crypto0_core Cryptographic Unit Port 0 Core
30 crypto1_enc Cryptographic Unit Port 1 Encryption
31 crypto1_core Cryptographic Unit Port 1 Core
The following is a list of provided IDs for Armada 380/385:
ID Clock Peripheral
-----------------------------------
0 audio Audio
2 ge2 Gigabit Ethernet 2
3 ge1 Gigabit Ethernet 1
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.