Documentation/devicetree/bindings/clock/qcom,mmcc.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/clock/qcom,mmcc.yaml
Extension
.yaml
Size
9736 bytes
Lines
347
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

# SPDX-License-Identifier: GPL-2.0-only
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,mmcc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Multimedia Clock & Reset Controller

maintainers:
  - Jeffrey Hugo <quic_jhugo@quicinc.com>
  - Taniya Das <quic_tdas@quicinc.com>

description: |
  Qualcomm multimedia clock control module provides the clocks, resets and
  power domains.

properties:
  compatible:
    enum:
      - qcom,mmcc-apq8064
      - qcom,mmcc-apq8084
      - qcom,mmcc-msm8226
      - qcom,mmcc-msm8660
      - qcom,mmcc-msm8960
      - qcom,mmcc-msm8974
      - qcom,mmcc-msm8992
      - qcom,mmcc-msm8994
      - qcom,mmcc-msm8996
      - qcom,mmcc-msm8998
      - qcom,mmcc-sdm630
      - qcom,mmcc-sdm660

  clocks:
    minItems: 7
    maxItems: 13

  clock-names:
    minItems: 7
    maxItems: 13

  vdd-gfx-supply:
    description:
      Regulator supply for the GPU_GX GDSC

required:
  - compatible
  - '#power-domain-cells'

allOf:
  - $ref: qcom,gcc.yaml#
  - if:
      properties:
        compatible:
          contains:
            enum:
              - qcom,mmcc-apq8064
              - qcom,mmcc-msm8960
    then:
      properties:
        clocks:
          minItems: 8
          items:
            - description: Board PXO source
            - description: PLL 3 clock
            - description: PLL 3 Vote clock
            - description: DSI phy instance 1 dsi clock
            - description: DSI phy instance 1 byte clock
            - description: DSI phy instance 2 dsi clock
            - description: DSI phy instance 2 byte clock
            - description: HDMI phy PLL clock

Annotation

Implementation Notes