Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml

File Facts

System

Linux kernel

Corpus path

Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml

Extension

.yaml

Size

2778 bytes

Lines

103

Domain

Support Tooling And Documentation

Bucket

Documentation

Inferred role

Support Tooling And Documentation: configuration, schema, or hardware description

Status

atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

• Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

• dt-bindings/clock/qcom,gcc-sm8450.h
• dt-bindings/clock/qcom,rpmh.h

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,sm8450-gpucc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Graphics Clock & Reset Controller on SM8450

maintainers:
  - Konrad Dybcio <konradybcio@kernel.org>
  - Taniya Das <taniya.das@oss.qualcomm.com>

description: |
  Qualcomm graphics clock control module provides the clocks, resets and power
  domains on Qualcomm SoCs.

  See also:
    include/dt-bindings/clock/qcom,glymur-gpucc.h
    include/dt-bindings/clock/qcom,kaanapali-gpucc.h
    include/dt-bindings/clock/qcom,milos-gpucc.h
    include/dt-bindings/clock/qcom,sar2130p-gpucc.h
    include/dt-bindings/clock/qcom,sm4450-gpucc.h
    include/dt-bindings/clock/qcom,sm8450-gpucc.h
    include/dt-bindings/clock/qcom,sm8550-gpucc.h
    include/dt-bindings/reset/qcom,sm8450-gpucc.h
    include/dt-bindings/reset/qcom,sm8650-gpucc.h
    include/dt-bindings/reset/qcom,sm8750-gpucc.h
    include/dt-bindings/reset/qcom,x1e80100-gpucc.h

properties:
  compatible:
    enum:
      - qcom,glymur-gpucc
      - qcom,kaanapali-gpucc
      - qcom,milos-gpucc
      - qcom,sar2130p-gpucc
      - qcom,sm4450-gpucc
      - qcom,sm8450-gpucc
      - qcom,sm8475-gpucc
      - qcom,sm8550-gpucc
      - qcom,sm8650-gpucc
      - qcom,sm8750-gpucc
      - qcom,x1e80100-gpucc
      - qcom,x1p42100-gpucc

  clocks:
    items:
      - description: Board XO source
      - description: GPLL0 main branch source
      - description: GPLL0 div branch source

  power-domains:
    items:
      - description: A phandle to the MX power-domain
      - description: A phandle to the CX power-domain

  required-opps:
    items:
      - description: A phandle to an OPP node describing MX performance points
      - description: A phandle to an OPP node describing CX performance points

required:
  - compatible
  - clocks
  - '#power-domain-cells'

allOf:
  - $ref: qcom,gcc.yaml#
  - if:
      properties:

Annotation

• Immediate include surface: `dt-bindings/clock/qcom,gcc-sm8450.h`, `dt-bindings/clock/qcom,rpmh.h`.
• Atlas domain: Support Tooling And Documentation / Documentation.
• Implementation status: atlas-only.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.