Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml

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System
Linux kernel
Corpus path
Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml
Extension
.yaml
Size
3053 bytes
Lines
104
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

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Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,sm8550-dispcc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Display Clock & Reset Controller for SM8550

maintainers:
  - Bjorn Andersson <andersson@kernel.org>
  - Neil Armstrong <neil.armstrong@linaro.org>

description: |
  Qualcomm display clock control module provides the clocks, resets and power
  domains on SM8550, SM8650, SM8750 and few other platforms.

  See also:
  - include/dt-bindings/clock/qcom,kaanapali-dispcc.h
  - include/dt-bindings/clock/qcom,sm8550-dispcc.h
  - include/dt-bindings/clock/qcom,sm8650-dispcc.h
  - include/dt-bindings/clock/qcom,sm8750-dispcc.h
  - include/dt-bindings/clock/qcom,x1e80100-dispcc.h

properties:
  compatible:
    enum:
      - qcom,kaanapali-dispcc
      - qcom,sar2130p-dispcc
      - qcom,sm8550-dispcc
      - qcom,sm8650-dispcc
      - qcom,sm8750-dispcc
      - qcom,x1e80100-dispcc

  clocks:
    items:
      - description: Board XO source
      - description: Board Always On XO source
      - description: Display's AHB clock
      - description: sleep clock
      - description: Byte clock from DSI PHY0
      - description: Pixel clock from DSI PHY0
      - description: Byte clock from DSI PHY1
      - description: Pixel clock from DSI PHY1
      - description: Link clock from DP PHY0
      - description: VCO DIV clock from DP PHY0
      - description: Link clock from DP PHY1
      - description: VCO DIV clock from DP PHY1
      - description: Link clock from DP PHY2
      - description: VCO DIV clock from DP PHY2
      - description: Link clock from DP PHY3
      - description: VCO DIV clock from DP PHY3

  power-domains:
    description:
      A phandle and PM domain specifier for the MMCX power domain.
    maxItems: 1

  required-opps:
    description:
      A phandle to an OPP node describing required MMCX performance point.
    maxItems: 1

required:
  - compatible
  - clocks
  - '#power-domain-cells'

allOf:
  - $ref: qcom,gcc.yaml#

Annotation

Implementation Notes