Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.yaml

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Linux kernel
Corpus path
Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.yaml
Extension
.yaml
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2221 bytes
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76
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

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Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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# SPDX-License-Identifier: (GPL-2.0+ OR MIT)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/rockchip,rv1108-cru.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Rockchip RV1108 Clock and Reset Unit (CRU)

maintainers:
  - Elaine Zhang <zhangqing@rock-chips.com>
  - Heiko Stuebner <heiko@sntech.de>

description: |
  The RV1108 clock controller generates and supplies clocks to various
  controllers within the SoC and also implements a reset controller for SoC
  peripherals.
  Each clock is assigned an identifier and client nodes can use this identifier
  to specify the clock which they consume. All available clocks are defined as
  preprocessor macros in the dt-bindings/clock/rv1108-cru.h headers and can be
  used in device tree sources. Similar macros exist for the reset sources in
  these files.
  There are several clocks that are generated outside the SoC. It is expected
  that they are defined using standard clock bindings with following
  clock-output-names:
    - "xin24m"   - crystal input                              - required
    - "ext_vip"  - external VIP clock                         - optional
    - "ext_i2s"  - external I2S clock                         - optional
    - "ext_gmac" - external GMAC clock                        - optional
    - "hdmiphy"  - external clock input derived from HDMI PHY - optional
    - "usbphy"   - external clock input derived from USB PHY  - optional

properties:
  compatible:
    enum:
      - rockchip,rv1108-cru

  reg:
    maxItems: 1

  "#clock-cells":
    const: 1

  "#reset-cells":
    const: 1

  clocks:
    maxItems: 1

  clock-names:
    const: xin24m

  rockchip,grf:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      Phandle to the syscon managing the "general register files" (GRF),
      if missing pll rates are not changeable, due to the missing pll
      lock status.

required:
  - compatible
  - reg
  - "#clock-cells"
  - "#reset-cells"

additionalProperties: false

examples:
  - |
    cru: clock-controller@20200000 {
      compatible = "rockchip,rv1108-cru";

Annotation

Implementation Notes