Documentation/devicetree/bindings/clock/samsung,exynos5433-clock.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/clock/samsung,exynos5433-clock.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/clock/samsung,exynos5433-clock.yaml
Extension
.yaml
Size
12319 bytes
Lines
525
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/samsung,exynos5433-clock.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Samsung Exynos5433 SoC clock controller

maintainers:
  - Chanwoo Choi <cw00.choi@samsung.com>
  - Krzysztof Kozlowski <krzk@kernel.org>
  - Sylwester Nawrocki <s.nawrocki@samsung.com>
  - Tomasz Figa <tomasz.figa@gmail.com>

description: |
  Expected external clocks, defined in DTS as fixed-rate clocks with a matching
  name::
    - "oscclk" - PLL input clock from XXTI

  All available clocks are defined as preprocessor macros in
  include/dt-bindings/clock/exynos5433.h header.

properties:
  compatible:
    enum:
        # CMU_TOP which generates clocks for
        # IMEM/FSYS/G3D/GSCL/HEVC/MSCL/G2D/MFC/PERIC/PERIS domains and bus
        # clocks
      - samsung,exynos5433-cmu-top
        # CMU_CPIF which generates clocks for LLI (Low Latency Interface) IP
      - samsung,exynos5433-cmu-cpif
        # CMU_MIF which generates clocks for DRAM Memory Controller domain
      - samsung,exynos5433-cmu-mif
        # CMU_PERIC which generates clocks for
        # UART/I2C/SPI/I2S/PCM/SPDIF/PWM/SLIMBUS IPs
      - samsung,exynos5433-cmu-peric
        # CMU_PERIS which generates clocks for PMU/TMU/MCT/WDT/RTC/SECKEY/TZPC IPs
      - samsung,exynos5433-cmu-peris
        # CMU_FSYS which generates clocks for USB/UFS/SDMMC/TSI/PDMA IPs
      - samsung,exynos5433-cmu-fsys
      - samsung,exynos5433-cmu-g2d
        # CMU_DISP which generates clocks for Display (DECON/HDMI/DSIM/MIXER) IPs
      - samsung,exynos5433-cmu-disp
      - samsung,exynos5433-cmu-aud
      - samsung,exynos5433-cmu-bus0
      - samsung,exynos5433-cmu-bus1
      - samsung,exynos5433-cmu-bus2
      - samsung,exynos5433-cmu-g3d
      - samsung,exynos5433-cmu-gscl
      - samsung,exynos5433-cmu-apollo
        # CMU_ATLAS which generates clocks for Cortex-A57 Quad-core processor,
        # CoreSight and  L2 cache controller
      - samsung,exynos5433-cmu-atlas
        # CMU_MSCL which generates clocks for M2M (Memory to Memory) scaler and
        # JPEG IPs
      - samsung,exynos5433-cmu-mscl
      - samsung,exynos5433-cmu-mfc
      - samsung,exynos5433-cmu-hevc
        # CMU_ISP which generates clocks for FIMC-ISP/DRC/SCLC/DIS/3DNR IPs
      - samsung,exynos5433-cmu-isp
        # CMU_CAM0 which generates clocks for
        # MIPI_CSIS{0|1}/FIMC_LITE_{A|B|D}/FIMC_3AA{0|1} IPs
      - samsung,exynos5433-cmu-cam0
        # CMU_CAM1 which generates clocks for
        # Cortex-A5/MIPI_CSIS2/FIMC-LITE_C/FIMC-FD IPs
      - samsung,exynos5433-cmu-cam1
        # CMU_IMEM which generates clocks for SSS (Security SubSystem) and
        # SlimSSS IPs
      - samsung,exynos5433-cmu-imem

Annotation

Implementation Notes