Documentation/devicetree/bindings/clock/silabs,si5341.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/clock/silabs,si5341.yaml

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System
Linux kernel
Corpus path
Documentation/devicetree/bindings/clock/silabs,si5341.yaml
Extension
.yaml
Size
6053 bytes
Lines
224
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/silabs,si5341.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Silicon Labs Si5340/1/2/4/5 programmable i2c clock generator

maintainers:
  - Mike Looijmans <mike.looijmans@topic.nl>

description: >
  Silicon Labs Si5340, Si5341 Si5342, Si5344 and Si5345 programmable i2c clock
  generator.

  Reference
  [1] Si5341 Data Sheet
      https://www.silabs.com/documents/public/data-sheets/Si5341-40-D-DataSheet.pdf
  [2] Si5341 Reference Manual
      https://www.silabs.com/documents/public/reference-manuals/Si5341-40-D-RM.pdf
  [3] Si5345 Reference Manual
      https://www.silabs.com/documents/public/reference-manuals/Si5345-44-42-D-RM.pdf

  The Si5341 and Si5340 are programmable i2c clock generators with up to 10 output
  clocks. The chip contains a PLL that sources 5 (or 4) multisynth clocks, which
  in turn can be directed to any of the 10 (or 4) outputs through a divider.
  The internal structure of the clock generators can be found in [2].
  The Si5345 is similar to the Si5341 with the addition of fractional input
  dividers and automatic input selection, as described in [3].
  The Si5342 and Si5344 are smaller versions of the Si5345, with 2 or 4 outputs.

  The driver can be used in "as is" mode, reading the current settings from the
  chip at boot, in case you have a (pre-)programmed device. If the PLL is not
  configured when the driver probes, it assumes the driver must fully initialize
  it.

  The device type, speed grade and revision are determined runtime by probing.

properties:
  compatible:
    enum:
      - silabs,si5340
      - silabs,si5341
      - silabs,si5342
      - silabs,si5344
      - silabs,si5345

  reg:
    maxItems: 1

  "#clock-cells":
    const: 2
    description: >
      The first value is "0" for outputs, "1" for synthesizers.

      The second value is the output or synthesizer index.

  "#address-cells":
    const: 1

  "#size-cells":
    const: 0

  clocks:
    minItems: 1
    maxItems: 4

  clock-names:
    minItems: 1
    items:

Annotation

Implementation Notes