Documentation/devicetree/bindings/clock/sophgo,sg2044-clk.yaml

File Facts

System

Linux kernel

Corpus path

Documentation/devicetree/bindings/clock/sophgo,sg2044-clk.yaml

Extension

.yaml

Size

2517 bytes

Lines

100

Domain

Support Tooling And Documentation

Bucket

Documentation

Inferred role

Support Tooling And Documentation: configuration, schema, or hardware description

Status

atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

• Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

• dt-bindings/clock/sophgo,sg2044-pll.h

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/sophgo,sg2044-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Sophgo SG2044 Clock Controller

maintainers:
  - Inochi Amaoto <inochiama@gmail.com>

description: |
  The Sophgo SG2044 clock controller requires an external oscillator
  as input clock.

  All available clocks are defined as preprocessor macros in
  include/dt-bindings/clock/sophgo,sg2044-clk.h

properties:
  compatible:
    const: sophgo,sg2044-clk

  reg:
    maxItems: 1

  clocks:
    items:
      - description: fpll0
      - description: fpll1
      - description: fpll2
      - description: dpll0
      - description: dpll1
      - description: dpll2
      - description: dpll3
      - description: dpll4
      - description: dpll5
      - description: dpll6
      - description: dpll7
      - description: mpll0
      - description: mpll1
      - description: mpll2
      - description: mpll3
      - description: mpll4
      - description: mpll5

  clock-names:
    items:
      - const: fpll0
      - const: fpll1
      - const: fpll2
      - const: dpll0
      - const: dpll1
      - const: dpll2
      - const: dpll3
      - const: dpll4
      - const: dpll5
      - const: dpll6
      - const: dpll7
      - const: mpll0
      - const: mpll1
      - const: mpll2
      - const: mpll3
      - const: mpll4
      - const: mpll5

  '#clock-cells':
    const: 1

required:
  - compatible

Annotation

• Immediate include surface: `dt-bindings/clock/sophgo,sg2044-pll.h`.
• Atlas domain: Support Tooling And Documentation / Documentation.
• Implementation status: atlas-only.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.