Documentation/devicetree/bindings/clock/starfive,jh7110-stgcrg.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/clock/starfive,jh7110-stgcrg.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/clock/starfive,jh7110-stgcrg.yaml- Extension
.yaml- Size
- 2111 bytes
- Lines
- 83
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/clock/starfive,jh7110-crg.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/starfive,jh7110-stgcrg.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: StarFive JH7110 System-Top-Group Clock and Reset Generator
maintainers:
- Xingyu Wu <xingyu.wu@starfivetech.com>
properties:
compatible:
const: starfive,jh7110-stgcrg
reg:
maxItems: 1
clocks:
items:
- description: Main Oscillator (24 MHz)
- description: HIFI4 core
- description: STG AXI/AHB
- description: USB (125 MHz)
- description: CPU Bus
- description: HIFI4 Axi
- description: NOC STG Bus
- description: APB Bus
clock-names:
items:
- const: osc
- const: hifi4_core
- const: stg_axiahb
- const: usb_125m
- const: cpu_bus
- const: hifi4_axi
- const: nocstg_bus
- const: apb_bus
'#clock-cells':
const: 1
description:
See <dt-bindings/clock/starfive,jh7110-crg.h> for valid indices.
'#reset-cells':
const: 1
description:
See <dt-bindings/reset/starfive,jh7110-crg.h> for valid indices.
required:
- compatible
- reg
- clocks
- clock-names
- '#clock-cells'
- '#reset-cells'
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/starfive,jh7110-crg.h>
stgcrg: clock-controller@10230000 {
compatible = "starfive,jh7110-stgcrg";
reg = <0x10230000 0x10000>;
clocks = <&osc>,
<&syscrg JH7110_SYSCLK_HIFI4_CORE>,
<&syscrg JH7110_SYSCLK_STG_AXIAHB>,
Annotation
- Immediate include surface: `dt-bindings/clock/starfive,jh7110-crg.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.