Documentation/devicetree/bindings/clock/stericsson,u8500-clks.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/clock/stericsson,u8500-clks.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/clock/stericsson,u8500-clks.yaml- Extension
.yaml- Size
- 5053 bytes
- Lines
- 179
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/clock/ste-db8500-clkout.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/stericsson,u8500-clks.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ST-Ericsson DB8500 (U8500) clocks
maintainers:
- Ulf Hansson <ulf.hansson@linaro.org>
- Linus Walleij <linusw@kernel.org>
description: While named "U8500 clocks" these clocks are inside the
DB8500 digital baseband system-on-chip and its siblings such as
DB8520. These bindings consider the clocks present in the SoC
itself, not off-chip clocks. There are four different on-chip
clocks - RTC (32 kHz), CPU clock (SMP TWD), PRCMU (power reset and
control management unit) clocks and PRCC (peripheral reset and
clock controller) clocks. For some reason PRCC 4 does not exist so
the itemization can be a bit unintuitive.
properties:
compatible:
enum:
- stericsson,u8500-clks
- stericsson,u8540-clks
- stericsson,u9540-clks
reg:
items:
- description: PRCC 1 register area
- description: PRCC 2 register area
- description: PRCC 3 register area
- description: PRCC 5 register area
- description: PRCC 6 register area
prcmu-clock:
description: A subnode with one clock cell for PRCMU (power, reset, control
management unit) clocks. The cell indicates which PRCMU clock in the
prcmu-clock node the consumer wants to use.
type: object
properties:
'#clock-cells':
const: 1
additionalProperties: false
prcc-periph-clock:
description: A subnode with two clock cells for PRCC (peripheral
reset and clock controller) peripheral clocks. The first cell indicates
which PRCC block the consumer wants to use, possible values are 1, 2, 3,
5, 6. The second cell indicates which clock inside the PRCC block it
wants, possible values are 0 thru 31.
type: object
properties:
'#clock-cells':
const: 2
additionalProperties: false
prcc-kernel-clock:
description: A subnode with two clock cells for PRCC (peripheral reset
and clock controller) kernel clocks. The first cell indicates which PRCC
block the consumer wants to use, possible values are 1, 2, 3, 5, 6. The
second cell indicates which clock inside the PRCC block it wants, possible
values are 0 thru 31.
type: object
Annotation
- Immediate include surface: `dt-bindings/clock/ste-db8500-clkout.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.