Documentation/devicetree/bindings/clock/ti,lmk04832.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/clock/ti,lmk04832.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/clock/ti,lmk04832.yaml- Extension
.yaml- Size
- 4781 bytes
- Lines
- 210
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/ti,lmk04832.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments LMK04832 Clock Controller
maintainers:
- Liam Beguin <liambeguin@gmail.com>
description: |
Devicetree binding for the LMK04832, a clock conditioner with JEDEC JESD204B
support. The LMK04832 is pin compatible with the LMK0482x family.
Link to datasheet, https://www.ti.com/lit/ds/symlink/lmk04832.pdf
properties:
compatible:
enum:
- ti,lmk04832
reg:
maxItems: 1
'#address-cells':
const: 1
'#size-cells':
const: 0
'#clock-cells':
const: 1
spi-max-frequency:
maximum: 5000000
clocks:
items:
- description: PLL2 reference clock.
clock-names:
items:
- const: oscin
reset-gpios:
maxItems: 1
ti,spi-4wire-rdbk:
description: |
Select SPI 4wire readback pin configuration.
Available readback pins are,
CLKin_SEL0 0
CLKin_SEL1 1
RESET 2
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1, 2]
default: 1
ti,vco-hz:
description: Optional to set VCO frequency of the PLL in Hertz.
ti,sysref-ddly:
description: SYSREF digital delay value.
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 8
maximum: 8191
default: 8
ti,sysref-mux:
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.