Documentation/devicetree/bindings/clock/ti/ti,divider-clock.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/clock/ti/ti,divider-clock.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/clock/ti/ti,divider-clock.yaml
Extension
.yaml
Size
4614 bytes
Lines
180
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

# SPDX-License-Identifier: GPL-2.0-only
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/ti/ti,divider-clock.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Texas Instruments divider clock

maintainers:
  - Tero Kristo <kristo@kernel.org>

description: |
  This clock It assumes a register-mapped adjustable clock rate divider
  that does not gate and has only one input clock or parent.  By default the
  value programmed into the register is one less than the actual divisor value.
  E.g:

  register value    actual divisor value
  0                 1
  1                 2
  2                 3

  This assumption may be modified by the following optional properties:

  ti,index-starts-at-one - valid divisor values start at 1, not the default
  of 0.  E.g:
  register value    actual divisor value
  1                 1
  2                 2
  3                 3

  ti,index-power-of-two - valid divisor values are powers of two.  E.g:
  register value    actual divisor value
  0                 1
  1                 2
  2                 4

  Additionally an array of valid dividers may be supplied like so:

  ti,dividers = <4>, <8>, <0>, <16>;

  Which will map the resulting values to a divisor table by their index:
  register value    actual divisor value
  0                 4
  1                 8
  2                 <invalid divisor, skipped>
  3                 16

  Any zero value in this array means the corresponding bit-value is invalid
  and must not be used.

  The binding must also provide the register to control the divider and
  unless the divider array is provided, min and max dividers. Optionally
  the number of bits to shift that mask, if necessary. If the shift value
  is missing it is the same as supplying a zero shift.

  This binding can also optionally provide support to the hardware autoidle
  feature.

allOf:
  - $ref: ti,autoidle.yaml#

properties:
  compatible:
    enum:
      - ti,divider-clock
      - ti,composite-divider-clock

  "#clock-cells":
    const: 0

Annotation

Implementation Notes