Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml

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System
Linux kernel
Corpus path
Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml
Extension
.yaml
Size
4063 bytes
Lines
138
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

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Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/mediatek/mediatek,merge.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Mediatek display merge

maintainers:
  - Chun-Kuang Hu <chunkuang.hu@kernel.org>
  - Philipp Zabel <p.zabel@pengutronix.de>

description: |
  Mediatek display merge, namely MERGE, is used to merge two slice-per-line
  inputs into one side-by-side output.
  MERGE device node must be siblings to the central MMSYS_CONFIG node.
  For a description of the MMSYS_CONFIG binding, see
  Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
  for details.

properties:
  compatible:
    oneOf:
      - enum:
          - mediatek,mt8173-disp-merge
          - mediatek,mt8195-disp-merge
          - mediatek,mt8195-mdp3-merge
      - items:
          - enum:
              - mediatek,mt8188-mdp3-merge
          - const: mediatek,mt8195-mdp3-merge
      - items:
          - const: mediatek,mt6795-disp-merge
          - const: mediatek,mt8173-disp-merge
      - items:
          - const: mediatek,mt8188-disp-merge
          - const: mediatek,mt8195-disp-merge

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  power-domains:
    description: A phandle and PM domain specifier as defined by bindings of
      the power controller specified by phandle. See
      Documentation/devicetree/bindings/power/power-domain.yaml for details.

  clocks:
    minItems: 1
    maxItems: 2

  clock-names:
    oneOf:
      - items:
          - const: merge
      - items:
          - const: merge
          - const: merge_async

  mediatek,merge-fifo-en:
    description:
      The setting of merge fifo is mainly provided for the display latency
      buffer to ensure that the back-end panel display data will not be
      underrun, a little more data is needed in the fifo.
      According to the merge fifo settings, when the water level is detected
      to be insufficient, it will trigger RDMA sending ultra and preulra
      command to SMI to speed up the data rate.
    type: boolean

Annotation

Implementation Notes