Documentation/devicetree/bindings/display/panel/panel-edp.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/display/panel/panel-edp.yaml

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Linux kernel
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Documentation/devicetree/bindings/display/panel/panel-edp.yaml
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.yaml
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Support Tooling And Documentation
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Documentation
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Support Tooling And Documentation: configuration, schema, or hardware description
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atlas-only

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/panel-edp.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Probeable (via DP AUX / EDID) eDP Panels with simple poweron sequences

maintainers:
  - Douglas Anderson <dianders@chromium.org>

description: |
  This binding file can be used to indicate that an eDP panel is connected
  to a Embedded DisplayPort AUX bus (see display/dp-aux-bus.yaml) without
  actually specifying exactly what panel is connected. This is useful for
  the case that more than one different panel could be connected to the
  board, either for second-sourcing purposes or to support multiple SKUs
  with different LCDs that hook up to a common board.

  As per above, a requirement for using this binding is that the panel is
  represented under the DP AUX bus. This means that we can use any
  information provided by the DP AUX bus (including the EDID) to identify
  the panel. We can use this to identify display size, resolution, and
  timings among other things.

  One piece of information about eDP panels that is typically _not_
  provided anywhere on the DP AUX bus is the power sequencing timings.
  This is the reason why, historically, we've always had to explicitly
  list eDP panels. We solve that here with two tricks. The "worst case"
  power on timings for any panels expected to be connected to a board are
  specified in these bindings. Once we've powered on, it's expected that
  the operating system will lookup the panel in a table (based on EDID
  information) to figure out other power sequencing timings.

  eDP panels in general can have somewhat arbitrary power sequencing
  requirements. However, even though it's arbitrary in general, the
  vast majority of panel datasheets have a power sequence diagram that
  looks the exactly the same as every other panel. Each panel datasheet
  cares about different timings in this diagram but the fact that the
  diagram is so similar means we can come up with a single driver to
  handle it.

  These diagrams all look roughly like this, sometimes labeled with
  slightly different numbers / lines but all pretty much the same
  sequence. This is because much of this diagram comes straight from
  the eDP Standard.

                __________________________________________________
  Vdd       ___/:                                                :\____       /
          _/    :                                                :     \_____/
           :<T1>:<T2>:                                 :<--T10-->:<T11>:<T12>:
                :    +-----------------------+---------+---------+
  eDP     -----------+ Black video           | Src vid | Blk vid +
  Display       :    +-----------------------+---------+---------+
                :     _______________________:_________:_________:
  HPD           :<T3>|                       :         :         |
          ___________|                       :         :         |_____________
                     :                       :         :         :
  Sink               +-----------------------:---------:---------+
  AUX CH  -----------+ AUX Ch operational    :         :         +-------------
                     +-----------------------:---------:---------+
                     :                       :         :         :
                     :<T4>:             :<T7>:         :         :
  Src main                +------+------+--------------+---------+
  lnk data----------------+LnkTrn| Idle |Valid vid data| Idle/off+-------------
                          +------+------+--------------+---------+
                          : <T5> :<-T6->:<-T8->:       :
                                               :__:<T9>:
  LED_EN                                       |  |
          _____________________________________|  |____________________________

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