Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml- Extension
.yaml- Size
- 4534 bytes
- Lines
- 194
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/clock/r9a07g044-cpg.hdt-bindings/interrupt-controller/arm-gic.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/renesas,rzg2l-du.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas RZ/G2L Display Unit (DU)
maintainers:
- Biju Das <biju.das.jz@bp.renesas.com>
- Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
description: |
These DT bindings describe the Display Unit embedded in the Renesas RZ/G2L
and RZ/V2L SoCs.
properties:
compatible:
oneOf:
- enum:
- renesas,r9a07g043u-du # RZ/G2UL
- renesas,r9a07g044-du # RZ/G2{L,LC}
- renesas,r9a09g057-du # RZ/V2H(P)
- renesas,r9a09g077-du # RZ/T2H
- items:
- enum:
- renesas,r9a07g054-du # RZ/V2L
- const: renesas,r9a07g044-du # RZ/G2L fallback
- items:
- const: renesas,r9a09g056-du # RZ/V2N
- const: renesas,r9a09g057-du # RZ/V2H(P) fallback
- items:
- const: renesas,r9a09g087-du # RZ/N2H
- const: renesas,r9a09g077-du # RZ/T2H fallback
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
items:
- description: Main clock
- description: Register access clock
- description: Video clock
clock-names:
items:
- const: aclk
- const: pclk
- const: vclk
resets:
maxItems: 1
power-domains:
maxItems: 1
ports:
$ref: /schemas/graph.yaml#/properties/ports
description: |
The connections to the DU output video ports are modeled using the OF
graph bindings. The number of ports and their assignment are
model-dependent. Each port shall have a single endpoint.
patternProperties:
"^port@[0-1]$":
$ref: /schemas/graph.yaml#/properties/port
unevaluatedProperties: false
Annotation
- Immediate include surface: `dt-bindings/clock/r9a07g044-cpg.h`, `dt-bindings/interrupt-controller/arm-gic.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.