Documentation/devicetree/bindings/dma/altr,msgdma.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/dma/altr,msgdma.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/dma/altr,msgdma.yaml- Extension
.yaml- Size
- 1371 bytes
- Lines
- 64
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/interrupt-controller/irq.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/dma/altr,msgdma.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Altera mSGDMA IP core
maintainers:
- Olivier Dautricourt <olivierdautricourt@gmail.com>
description: |
Altera / Intel modular Scatter-Gather Direct Memory Access (mSGDMA)
intellectual property (IP)
allOf:
- $ref: dma-controller.yaml#
properties:
compatible:
const: altr,socfpga-msgdma
reg:
items:
- description: Control and Status Register Slave Port
- description: Descriptor Slave Port
- description: Response Slave Port (Optional)
minItems: 2
reg-names:
items:
- const: csr
- const: desc
- const: resp
minItems: 2
interrupts:
maxItems: 1
"#dma-cells":
const: 1
description:
The cell identifies the channel id (must be 0)
required:
- compatible
- reg
- reg-names
- interrupts
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
msgdma_controller: dma-controller@ff200b00 {
compatible = "altr,socfpga-msgdma";
reg = <0xff200b00 0x100>, <0xff200c00 0x100>, <0xff200d00 0x100>;
reg-names = "csr", "desc", "resp";
interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
};
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/irq.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.