Documentation/devicetree/bindings/dma/atmel,at91sam9g45-dma.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/dma/atmel,at91sam9g45-dma.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/dma/atmel,at91sam9g45-dma.yaml- Extension
.yaml- Size
- 1757 bytes
- Lines
- 69
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/dma/atmel,at91sam9g45-dma.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Atmel Direct Memory Access Controller (DMA)
maintainers:
- Ludovic Desroches <ludovic.desroches@microchip.com>
description:
The Atmel Direct Memory Access Controller (DMAC) transfers data from a source
peripheral to a destination peripheral over one or more AMBA buses. One channel
is required for each source/destination pair. In the most basic configuration,
the DMAC has one master interface and one channel. The master interface reads
the data from a source and writes it to a destination. Two AMBA transfers are
required for each DMAC data transfer. This is also known as a dual-access transfer.
The DMAC is programmed via the APB interface.
properties:
compatible:
enum:
- atmel,at91sam9g45-dma
- atmel,at91sam9rl-dma
reg:
maxItems: 1
interrupts:
maxItems: 1
"#dma-cells":
description:
Must be <2>, used to represent the number of integer cells in the dma
property of client devices. The two cells in order are
1. The first cell represents the channel number.
2. The second cell is 0 for RX and 1 for TX transfers.
const: 2
clocks:
maxItems: 1
clock-names:
const: dma_clk
required:
- compatible
- reg
- interrupts
- "#dma-cells"
- clocks
- clock-names
additionalProperties: false
examples:
- |
dma-controller@ffffec00 {
compatible = "atmel,at91sam9g45-dma";
reg = <0xffffec00 0x200>;
interrupts = <21>;
#dma-cells = <2>;
clocks = <&pmc 2 20>;
clock-names = "dma_clk";
};
...
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.