Documentation/devicetree/bindings/dma/atmel,sama5d4-dma.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/dma/atmel,sama5d4-dma.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/dma/atmel,sama5d4-dma.yaml
Extension
.yaml
Size
2297 bytes
Lines
85
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/dma/atmel,sama5d4-dma.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Microchip AT91 Extensible Direct Memory Access Controller

maintainers:
  - Nicolas Ferre <nicolas.ferre@microchip.com>
  - Charan Pedumuru <charan.pedumuru@microchip.com>

description:
  The DMA Controller (XDMAC) is a AHB-protocol central direct memory access
  controller. It performs peripheral data transfer and memory move operations
  over one or two bus ports through the unidirectional communication
  channel. Each channel is fully programmable and provides both peripheral
  or memory-to-memory transfers. The channel features are configurable at
  implementation.

allOf:
  - $ref: dma-controller.yaml#

properties:
  compatible:
    oneOf:
      - enum:
          - atmel,sama5d4-dma
          - microchip,sama7g5-dma
      - items:
          - enum:
              - microchip,sam9x60-dma
              - microchip,sam9x7-dma
          - const: atmel,sama5d4-dma
      - items:
          - enum:
              - microchip,lan9691-dma
              - microchip,sama7d65-dma
          - const: microchip,sama7g5-dma

  "#dma-cells":
    description: |
      Represents the number of integer cells in the `dmas` property of client
      devices. The single cell specifies the channel configuration register:
        - bit 13: SIF (Source Interface Identifier) for memory interface.
        - bit 14: DIF (Destination Interface Identifier) for peripheral interface.
        - bit 30-24: PERID (Peripheral Identifier).
    const: 1

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    maxItems: 1

  clock-names:
    const: dma_clk

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - "#dma-cells"

unevaluatedProperties: false

Annotation

Implementation Notes