Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml
Extension
.yaml
Size
1969 bytes
Lines
81
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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Annotated Snippet

# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/dma/sifive,fu540-c000-pdma.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: SiFive Unleashed Rev C000 Platform DMA

maintainers:
  - Green Wan <green.wan@sifive.com>
  - Palmer Debbelt <palmer@sifive.com>
  - Paul Walmsley <paul.walmsley@sifive.com>

description: |
  Platform DMA is a DMA engine of SiFive Unleashed. It supports 4
  channels. Each channel has 2 interrupts. One is for DMA done and
  the other is for DME error.

  In different SoC, DMA could be attached to different IRQ line.
  DT file need to be changed to meet the difference. For technical
  doc,

  https://static.dev.sifive.com/FU540-C000-v1.0.pdf

allOf:
  - $ref: dma-controller.yaml#

properties:
  compatible:
    oneOf:
      - items:
          - const: microchip,pic64gx-pdma
          - const: microchip,mpfs-pdma
          - const: sifive,pdma0
      - items:
          - enum:
              - microchip,mpfs-pdma
              - sifive,fu540-c000-pdma
          - const: sifive,pdma0
    description:
      Should be "sifive,<chip>-pdma" and "sifive,pdma<version>".
      Supported compatible strings are -
      "sifive,fu540-c000-pdma" for the SiFive PDMA v0 as integrated onto the
      SiFive FU540 chip resp and "sifive,pdma0" for the SiFive PDMA v0 IP block
      with no chip integration tweaks.

  reg:
    maxItems: 1

  interrupts:
    minItems: 1
    maxItems: 8

  dma-channels:
    description: For backwards-compatibility, the default value is 4
    minimum: 1
    maximum: 4
    default: 4

  '#dma-cells':
    const: 1

required:
  - compatible
  - reg
  - interrupts

unevaluatedProperties: false

examples:

Annotation

Implementation Notes