Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml- Extension
.yaml- Size
- 3848 bytes
- Lines
- 168
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/interrupt-controller/arm-gic.hdt-bindings/interrupt-controller/irq.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/dma/snps,dw-axi-dmac.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Synopsys DesignWare AXI DMA Controller
maintainers:
- Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
description:
Synopsys DesignWare AXI DMA Controller DT Binding
allOf:
- $ref: dma-controller.yaml#
properties:
compatible:
oneOf:
- enum:
- snps,axi-dma-1.01a
- intel,kmb-axi-dma
- sophgo,cv1800b-axi-dma
- starfive,jh7110-axi-dma
- starfive,jh8100-axi-dma
- items:
- const: altr,agilex5-axi-dma
- const: snps,axi-dma-1.01a
reg:
minItems: 1
items:
- description: Address range of the DMAC registers
- description: Address range of the DMAC APB registers
reg-names:
items:
- const: axidma_ctrl_regs
- const: axidma_apb_regs
interrupts:
description:
If the IP-core synthesis parameter DMAX_INTR_IO_TYPE is set to 1, this
will be per-channel interrupts. Otherwise, this is a single combined IRQ
for all channels.
minItems: 1
maxItems: 8
iommus:
maxItems: 1
clocks:
items:
- description: Bus Clock
- description: Module Clock
clock-names:
items:
- const: core-clk
- const: cfgr-clk
'#dma-cells':
const: 1
dma-channels:
minimum: 1
maximum: 8
dma-noncoherent: true
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/arm-gic.h`, `dt-bindings/interrupt-controller/irq.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.