Documentation/devicetree/bindings/dma/ti-edma.txt
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/dma/ti-edma.txt
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/dma/ti-edma.txt- Extension
.txt- Size
- 7516 bytes
- Lines
- 239
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: documentation
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
Texas Instruments eDMA
The eDMA3 consists of two components: Channel controller (CC) and Transfer
Controller(s) (TC). The CC is the main entry for DMA users since it is
responsible for the DMA channel handling, while the TCs are responsible to
execute the actual DMA tansfer.
------------------------------------------------------------------------------
eDMA3 Channel Controller
Required properties:
--------------------
- compatible: Should be:
- "ti,edma3-tpcc" for the channel controller(s) on OMAP,
AM33xx and AM43xx SoCs.
- "ti,k2g-edma3-tpcc", "ti,edma3-tpcc" for the
channel controller(s) on 66AK2G.
- #dma-cells: Should be set to <2>. The first number is the DMA request
number and the second is the TC the channel is serviced on.
- reg: Memory map of eDMA CC
- reg-names: "edma3_cc"
- interrupts: Interrupt lines for CCINT, MPERR and CCERRINT.
- interrupt-names: "edma3_ccint", "edma3_mperr" and "edma3_ccerrint"
- ti,tptcs: List of TPTCs associated with the eDMA in the following form:
<&tptc_phandle TC_priority_number>. The highest priority is 0.
SoC-specific Required properties:
--------------------------------
The following are mandatory properties for OMAP, AM33xx and AM43xx SoCs only:
- ti,hwmods: Name of the hwmods associated to the eDMA CC.
The following are mandatory properties for 66AK2G SoCs only:
- power-domains:Should contain a phandle to a PM domain provider node
and an args specifier containing the device id
value. This property is as per the binding,
Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml
Optional properties:
-------------------
- ti,edma-memcpy-channels: List of channels allocated to be used for memcpy, iow
these channels will be SW triggered channels. See example.
- ti,edma-reserved-slot-ranges: PaRAM slot ranges which should not be used by
the driver, they are allocated to be used by for example the
DSP. See example.
- dma-channel-mask: Mask of usable channels.
Single uint32 for EDMA with 32 channels, array of two uint32 for
EDMA with 64 channels. See example and
Documentation/devicetree/bindings/dma/dma-common.yaml
------------------------------------------------------------------------------
eDMA3 Transfer Controller
Required properties:
--------------------
- compatible: Should be:
- "ti,edma3-tptc" for the transfer controller(s) on OMAP,
AM33xx and AM43xx SoCs.
- "ti,k2g-edma3-tptc", "ti,edma3-tptc" for the
transfer controller(s) on 66AK2G.
- reg: Memory map of eDMA TC
- interrupts: Interrupt number for TCerrint.
SoC-specific Required properties:
--------------------------------
The following are mandatory properties for OMAP, AM33xx and AM43xx SoCs only:
- ti,hwmods: Name of the hwmods associated to the eDMA TC.
The following are mandatory properties for 66AK2G SoCs only:
- power-domains:Should contain a phandle to a PM domain provider node
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.