Documentation/devicetree/bindings/dpll/dpll-device.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/dpll/dpll-device.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/dpll/dpll-device.yaml- Extension
.yaml- Size
- 1779 bytes
- Lines
- 77
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/dpll/dpll-device.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Digital Phase-Locked Loop (DPLL) Device
maintainers:
- Ivan Vecera <ivecera@redhat.com>
description:
Digital Phase-Locked Loop (DPLL) device is used for precise clock
synchronization in networking and telecom hardware. The device can
have one or more channels (DPLLs) and one or more physical input and
output pins. Each DPLL channel can either produce pulse-per-clock signal
or drive ethernet equipment clock. The type of each channel can be
indicated by dpll-types property.
properties:
$nodename:
pattern: "^dpll(@.*)?$"
"#address-cells":
const: 0
"#size-cells":
const: 0
dpll-types:
description: List of DPLL channel types, one per DPLL instance.
$ref: /schemas/types.yaml#/definitions/non-unique-string-array
items:
enum: [pps, eec]
input-pins:
type: object
description: DPLL input pins
unevaluatedProperties: false
properties:
"#address-cells":
const: 1
"#size-cells":
const: 0
patternProperties:
"^pin@[0-9a-f]+$":
$ref: /schemas/dpll/dpll-pin.yaml
unevaluatedProperties: false
required:
- "#address-cells"
- "#size-cells"
output-pins:
type: object
description: DPLL output pins
unevaluatedProperties: false
properties:
"#address-cells":
const: 1
"#size-cells":
const: 0
patternProperties:
"^pin@[0-9]+$":
$ref: /schemas/dpll/dpll-pin.yaml
unevaluatedProperties: false
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.