Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.yaml- Extension
.yaml- Size
- 7359 bytes
- Lines
- 325
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/interrupt-controller/arm-gic.hdt-bindings/interrupt-controller/irq.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright (C) 2025 Altera Corporation
%YAML 1.2
---
$id: http://devicetree.org/schemas/edac/altr,socfpga-ecc-manager.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Altera SoCFPGA ECC Manager
maintainers:
- Niravkumar L Rabara <niravkumarlaxmidas.rabara@altera.com>
description:
This binding describes the device tree nodes required for the Altera SoCFPGA
ECC Manager for the Cyclone5, Arria5, Arria10, Stratix10, and Agilex chip
families.
properties:
compatible:
oneOf:
- items:
- const: altr,socfpga-s10-ecc-manager
- const: altr,socfpga-a10-ecc-manager
- const: altr,socfpga-a10-ecc-manager
- const: altr,socfpga-ecc-manager
"#address-cells":
const: 1
"#size-cells":
const: 1
interrupts:
minItems: 1
maxItems: 2
interrupt-controller: true
"#interrupt-cells":
const: 2
ranges: true
altr,sysmgr-syscon:
$ref: /schemas/types.yaml#/definitions/phandle
description: phandle to Stratix10 System Manager Block with the ECC manager registers
sdramedac:
type: object
additionalProperties: false
properties:
compatible:
enum:
- altr,sdram-edac
- altr,sdram-edac-a10
- altr,sdram-edac-s10
interrupts:
minItems: 1
maxItems: 2
altr,sdr-syscon:
$ref: /schemas/types.yaml#/definitions/phandle
description: phandle to SDRAM parent
required:
- compatible
- interrupts
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/arm-gic.h`, `dt-bindings/interrupt-controller/irq.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.