Documentation/devicetree/bindings/edac/apm,xgene-edac.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/edac/apm,xgene-edac.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/edac/apm,xgene-edac.yaml- Extension
.yaml- Size
- 4574 bytes
- Lines
- 203
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/edac/apm,xgene-edac.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: APM X-Gene SoC EDAC
maintainers:
- Khuong Dinh <khuong@os.amperecomputing.com>
description: >
EDAC node is defined to describe on-chip error detection and correction.
The following error types are supported:
memory controller - Memory controller
PMD (L1/L2) - Processor module unit (PMD) L1/L2 cache
L3 - L3 cache controller
SoC - SoC IPs such as Ethernet, SATA, etc
properties:
compatible:
const: apm,xgene-edac
reg:
items:
- description: CPU bus (PCP) resource
'#address-cells':
const: 2
'#size-cells':
const: 2
ranges: true
interrupts:
description: Interrupt-specifier for MCU, PMD, L3, or SoC error IRQ(s).
items:
- description: MCU error IRQ
- description: PMD error IRQ
- description: L3 error IRQ
- description: SoC error IRQ
minItems: 1
regmap-csw:
description: Regmap of the CPU switch fabric (CSW) resource.
$ref: /schemas/types.yaml#/definitions/phandle
regmap-mcba:
description: Regmap of the MCB-A (memory bridge) resource.
$ref: /schemas/types.yaml#/definitions/phandle
regmap-mcbb:
description: Regmap of the MCB-B (memory bridge) resource.
$ref: /schemas/types.yaml#/definitions/phandle
regmap-efuse:
description: Regmap of the PMD efuse resource.
$ref: /schemas/types.yaml#/definitions/phandle
regmap-rb:
description: Regmap of the register bus resource (optional for compatibility).
$ref: /schemas/types.yaml#/definitions/phandle
required:
- compatible
- regmap-csw
- regmap-mcba
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.