Documentation/devicetree/bindings/firmware/intel,ixp4xx-network-processing-engine.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/firmware/intel,ixp4xx-network-processing-engine.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/firmware/intel,ixp4xx-network-processing-engine.yaml- Extension
.yaml- Size
- 2934 bytes
- Lines
- 95
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/gpio/gpio.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright 2019 Linaro Ltd.
%YAML 1.2
---
$id: http://devicetree.org/schemas/firmware/intel,ixp4xx-network-processing-engine.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Intel IXP4xx Network Processing Engine
maintainers:
- Linus Walleij <linusw@kernel.org>
description: |
On the IXP4xx SoCs, the Network Processing Engine (NPE) is a small
processor that can load a firmware to perform offloading of networking
and crypto tasks. It also manages the MDIO bus to the ethernet PHYs
on the IXP4xx platform. All IXP4xx platforms have three NPEs at
consecutive memory locations. They are all included in the same
device node since they are not independent of each other.
properties:
compatible:
oneOf:
- items:
- const: intel,ixp4xx-network-processing-engine
reg:
items:
- description: NPE0 (NPE-A) register range
- description: NPE1 (NPE-B) register range
- description: NPE2 (NPE-C) register range
crypto:
$ref: /schemas/crypto/intel,ixp4xx-crypto.yaml#
type: object
description: Optional node for the embedded crypto engine, the node
should be named with the instance number of the NPE engine used for
the crypto engine.
"#address-cells":
const: 1
"#size-cells":
const: 0
patternProperties:
hss@[0-9]+$:
$ref: /schemas/net/intel,ixp4xx-hss.yaml#
type: object
description: Optional node for the High Speed Serial link (HSS), the
node should be named with the instance number of the NPE engine
used for the HSS.
required:
- compatible
- reg
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
npe: npe@c8006000 {
compatible = "intel,ixp4xx-network-processing-engine";
reg = <0xc8006000 0x1000>, <0xc8007000 0x1000>, <0xc8008000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
hss@0 {
Annotation
- Immediate include surface: `dt-bindings/gpio/gpio.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.