Documentation/devicetree/bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml- Extension
.yaml- Size
- 1011 bytes
- Lines
- 37
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/fpga/intel,stratix10-soc-fpga-mgr.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Intel Stratix10 SoC FPGA Manager
maintainers:
- Mahesh Rao <mahesh.rao@altera.com>
- Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com>
- Niravkumar L Rabara <nirav.rabara@altera.com>
description:
The Intel Stratix10 SoC consists of a 64-bit quad-core ARM Cortex A53 hard
processor system (HPS) and a Secure Device Manager (SDM). The Stratix10
SoC FPGA Manager driver is used to configure/reconfigure the FPGA fabric
on the die.The driver communicates with SDM/ATF via the stratix10-svc
platform driver for performing its operations.
properties:
compatible:
enum:
- intel,stratix10-soc-fpga-mgr
- intel,agilex-soc-fpga-mgr
required:
- compatible
additionalProperties: false
examples:
- |
fpga-mgr {
compatible = "intel,stratix10-soc-fpga-mgr";
};
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.