Documentation/devicetree/bindings/fpga/xlnx,pr-decoupler.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/fpga/xlnx,pr-decoupler.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/fpga/xlnx,pr-decoupler.yaml- Extension
.yaml- Size
- 1951 bytes
- Lines
- 68
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/fpga/xlnx,pr-decoupler.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Xilinx LogiCORE Partial Reconfig Decoupler/AXI shutdown manager Softcore
maintainers:
- Nava kishore Manne <nava.kishore.manne@amd.com>
allOf:
- $ref: fpga-bridge.yaml#
description: |
The Xilinx LogiCORE Partial Reconfig(PR) Decoupler manages one or more
decouplers/fpga bridges. The controller can decouple/disable the bridges
which prevents signal changes from passing through the bridge. The controller
can also couple / enable the bridges which allows traffic to pass through the
bridge normally.
Xilinx LogiCORE Dynamic Function eXchange(DFX) AXI shutdown manager Softcore
is compatible with the Xilinx LogiCORE pr-decoupler. The Dynamic Function
eXchange AXI shutdown manager prevents AXI traffic from passing through the
bridge. The controller safely handles AXI4MM and AXI4-Lite interfaces on a
Reconfigurable Partition when it is undergoing dynamic reconfiguration,
preventing the system deadlock that can occur if AXI transactions are
interrupted by DFX.
Please refer to fpga-region.txt and fpga-bridge.txt in this directory for
common binding part and usage.
properties:
compatible:
oneOf:
- items:
- const: xlnx,pr-decoupler-1.00
- const: xlnx,pr-decoupler
- items:
- const: xlnx,dfx-axi-shutdown-manager-1.00
- const: xlnx,dfx-axi-shutdown-manager
reg:
maxItems: 1
clocks:
maxItems: 1
clock-names:
items:
- const: aclk
required:
- compatible
- reg
- clocks
- clock-names
unevaluatedProperties: false
examples:
- |
fpga-bridge@100000450 {
compatible = "xlnx,pr-decoupler-1.00", "xlnx,pr-decoupler";
reg = <0x10000045 0x10>;
clocks = <&clkc 15>;
clock-names = "aclk";
};
...
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.