Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml
Extension
.yaml
Size
2795 bytes
Lines
98
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/gpio/fairchild,74hc595.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Generic 8-bit shift register

description: |
  NOTE: These chips nominally don't have a chip select pin. They do however
  have a rising-edge triggered latch clock (or storage register clock) pin,
  which behaves like an active-low chip select.

  After the bits are shifted into the shift register, CS# is driven high, which
  the 74HC595 sees as a rising edge on the latch clock that results in a
  transfer of the bits from the shift register to the storage register and thus
  to the output pins.
                      _   _       _   _
  shift clock    ____| |_| |_..._| |_| |_________

  latch clock                           * trigger
                 ___                     ________
  chip select#      |___________________|

maintainers:
  - Maxime Ripard <mripard@kernel.org>

properties:
  compatible:
    enum:
      - fairchild,74hc595
      - nxp,74lvc594

  reg:
    maxItems: 1

  gpio-controller: true

  '#gpio-cells':
    description:
      The second cell is only used to specify the GPIO polarity.
    const: 2

  registers-number:
    $ref: /schemas/types.yaml#/definitions/uint32
    description: Number of daisy-chained shift registers

  lines-initial-states:
    $ref: /schemas/types.yaml#/definitions/uint32
    description:
      Bitmask that specifies the initial state of each output line, written
      by the driver before the gpiochip is registered. Bit N corresponds to
      GPIO line N, following the convention already documented for
      nxp,pcf8575. Because the 74HC595/74LVC594 family is push-pull output
      only, a bit set to zero drives the line low and a bit set to one
      drives it high. The bitmask covers up to 32 lines (four cascaded
      registers); outputs beyond that come up zeroed. When the property is
      absent all outputs come up low, preserving the previous behaviour.

  enable-gpios:
    description: GPIO connected to the OE (Output Enable) pin.
    maxItems: 1

patternProperties:
  "^(hog-[0-9]+|.+-hog(-[0-9]+)?)$":
    type: object
    required:
      - gpio-hog

required:

Annotation

Implementation Notes