Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml
Extension
.yaml
Size
3406 bytes
Lines
157
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/gpio/gpio-mvebu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Marvell EBU GPIO controller

maintainers:
  - Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  - Andrew Lunn <andrew@lunn.ch>

properties:
  compatible:
    oneOf:
      - enum:
          - marvell,armada-8k-gpio
          - marvell,orion-gpio

      - items:
          - enum:
              - marvell,mv78200-gpio
              - marvell,armada-370-gpio
          - const: marvell,orion-gpio

      - description: Deprecated binding
        items:
          - const: marvell,armadaxp-gpio
          - const: marvell,orion-gpio
        deprecated: true

  reg:
    description: |
      Address and length of the register set for the device. Not used for
      marvell,armada-8k-gpio.

      A second entry can be provided, for the PWM function using the GPIO Blink
      Counter on/off registers.
    minItems: 1
    maxItems: 2

  reg-names:
    items:
      - const: gpio
      - const: pwm
    minItems: 1

  offset:
    $ref: /schemas/types.yaml#/definitions/uint32
    description: Offset in the register map for the gpio registers (in bytes)

  interrupts:
    description: |
      The list of interrupts that are used for all the pins managed by this
      GPIO bank. There can be more than one interrupt (example: 1 interrupt
      per 8 pins on Armada XP, which means 4 interrupts per bank of 32
      GPIOs).
    minItems: 1
    maxItems: 4

  interrupt-controller: true

  "#interrupt-cells":
    const: 2

  gpio-controller: true

  ngpios:
    minimum: 1
    maximum: 32

Annotation

Implementation Notes