Documentation/devicetree/bindings/hwmon/amd,sbtsi.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/hwmon/amd,sbtsi.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/hwmon/amd,sbtsi.yaml- Extension
.yaml- Size
- 1436 bytes
- Lines
- 55
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/hwmon/amd,sbtsi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: >
Sideband interface Temperature Sensor Interface (SB-TSI) compliant
AMD SoC temperature device
maintainers:
- Kun Yi <kunyi@google.com>
- Supreeth Venkatesh <supreeth.venkatesh@amd.com>
description: |
SB Temperature Sensor Interface (SB-TSI) is an SMBus compatible
interface that reports AMD SoC's Ttcl (normalized temperature),
and resembles a typical 8-pin remote temperature sensor's I2C interface
to BMC. The emulated thermal sensor can report temperatures in increments
of 0.125 degrees, ranging from 0 to 255.875.
properties:
compatible:
enum:
- amd,sbtsi
reg:
maxItems: 1
description: |
I2C bus address of the device as specified in Section 6.3.1 of the
SoC register reference. The SB-TSI address is normally 98h for socket
0 and 90h for socket 1, but it could vary based on hardware address
select pins.
\[open source SoC register reference\]
https://www.amd.com/system/files/TechDocs/56255_OSRR.pdf
required:
- compatible
- reg
additionalProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
sbtsi@4c {
compatible = "amd,sbtsi";
reg = <0x4c>;
};
};
...
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.