Documentation/devicetree/bindings/iio/resolver/adi,ad2s1210.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/iio/resolver/adi,ad2s1210.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/iio/resolver/adi,ad2s1210.yaml
Extension
.yaml
Size
5191 bytes
Lines
178
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/resolver/adi,ad2s1210.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Analog Devices AD2S1210 Resolver-to-Digital Converter

maintainers:
  - Michael Hennerich <michael.hennerich@analog.com>

description: |
  The AD2S1210 is a complete 10-bit to 16-bit resolution tracking
  resolver-to-digital converter, integrating an on-board programmable
  sinusoidal oscillator that provides sine wave excitation for
  resolvers.

  The AD2S1210 allows the user to read the angular position or the
  angular velocity data directly from the parallel outputs or through
  the serial interface.

  The mode of operation of the communication channel (parallel or serial) is
  selected by the A0 and A1 input pins. In normal mode, data is latched by
  toggling the SAMPLE line and can then be read directly. In configuration mode,
  data is read or written using a register access scheme (address byte with
  read/write flag and data byte).

    A1  A0  Result
     0   0  Normal mode - position output
     0   1  Normal mode - velocity output
     1   0  Reserved
     1   1  Configuration mode

  In normal mode, the resolution of the digital output is selected using
  the RES0 and RES1 input pins. In configuration mode, the resolution is
  selected by setting the RES0 and RES1 bits in the control register.

  RES1  RES0  Resolution (Bits)
     0     0  10
     0     1  12
     1     0  14
     1     1  16

  Note on SPI connections: The CS line on the AD2S1210 should hard-wired to
  logic low and the WR/FSYNC line on the AD2S1210 should be connected to the
  SPI CSn output of the SPI controller.

  Datasheet:
  https://www.analog.com/media/en/technical-documentation/data-sheets/ad2s1210.pdf

properties:
  compatible:
    const: adi,ad2s1210

  reg:
    maxItems: 1

  spi-max-frequency:
    maximum: 25000000

  spi-cpha: true

  avdd-supply:
    description:
      A 4.75 to 5.25 V regulator that powers the Analog Supply Voltage (AVDD)
      pin.

  dvdd-supply:
    description:
      A 4.75 to 5.25 V regulator that powers the Digital Supply Voltage (DVDD)

Annotation

Implementation Notes