Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml- Extension
.yaml- Size
- 4220 bytes
- Lines
- 157
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/apple,aic2.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Apple Interrupt Controller 2 and 3
maintainers:
- Janne Grunau <j@jannau.net>
description: |
The Apple Interrupt Controller 2 is a simple interrupt controller present on
Apple ARM SoC platforms starting with t600x (M1 Pro and Max).
It provides the following features:
- Level-triggered hardware IRQs wired to SoC blocks
- Single mask bit per IRQ
- Automatic masking on event delivery (auto-ack)
- Software triggering (ORed with hw line)
- Automatic prioritization (single event/ack register per CPU, lower IRQs =
higher priority)
- Automatic masking on ack
- Support for multiple dies
This device also represents the FIQ interrupt sources on platforms using AIC,
which do not go through a discrete interrupt controller. It also handles
FIQ-based Fast IPIs.
The Apple Interrupt Controller 3 is in its base functionality very similar to
the Apple Interrupt Controller 2 and uses the same device tree bindings. It is
found on Apple ARM SoCs platforms starting with t8122 (M3).
properties:
compatible:
oneOf:
- items:
- enum:
- apple,t6000-aic
- apple,t6020-aic
- apple,t8112-aic
- const: apple,aic2
- items:
- enum:
- apple,t6030-aic3
- const: apple,t8122-aic3
- const: apple,t8122-aic3
interrupt-controller: true
'#interrupt-cells':
minimum: 3
maximum: 4
description: |
The 1st cell contains the interrupt type:
- 0: Hardware IRQ
- 1: FIQ
The 2nd cell contains the die ID (only present on apple,t6000-aic).
The next cell contains the interrupt number.
- HW IRQs: interrupt number
- FIQs:
- 0: physical HV timer
- 1: virtual HV timer
- 2: physical guest timer
- 3: virtual guest timer
The last cell contains the interrupt flags. This is normally
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.