Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml

File Facts

System: Linux kernel
Corpus path: Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
Extension: .yaml
Size: 7131 bytes
Lines: 245
Domain: Support Tooling And Documentation
Bucket: Documentation
Inferred role: Support Tooling And Documentation: configuration, schema, or hardware description
Status: atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Touches IRQ or DMA behavior; this matters for the representative real-device path.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/arm,gic.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: ARM Generic Interrupt Controller v1 and v2

maintainers:
  - Marc Zyngier <marc.zyngier@arm.com>

description: |+
  ARM SMP cores are often associated with a GIC, providing per processor
  interrupts (PPI), shared processor interrupts (SPI) and software
  generated interrupts (SGI).

  Primary GIC is attached directly to the CPU and typically has PPIs and SGIs.
  Secondary GICs are cascaded into the upward interrupt controller and do not
  have PPIs or SGIs.

allOf:
  - $ref: /schemas/interrupt-controller.yaml#

properties:
  compatible:
    oneOf:
      - items:
          - enum:
              - arm,arm11mp-gic
              - arm,cortex-a15-gic
              - arm,cortex-a7-gic
              - arm,cortex-a5-gic
              - arm,cortex-a9-gic
              - arm,eb11mp-gic
              - arm,gic-400
              - arm,pl390
              - arm,tc11mp-gic
              - qcom,msm-8660-qgic
              - qcom,msm-qgic2

      - items:
          - const: arm,gic-400
          - enum:
              - arm,cortex-a15-gic
              - arm,cortex-a7-gic

      - items:
          - const: arm,arm1176jzf-devchip-gic
          - const: arm,arm11mp-gic

      - items:
          - const: brcm,brahma-b15-gic
          - const: arm,cortex-a15-gic

      - oneOf:
          - const: nvidia,tegra210-agic
          - items:
              - enum:
                  - nvidia,tegra186-agic
                  - nvidia,tegra194-agic
                  - nvidia,tegra234-agic
                  - nvidia,tegra264-agic
              - const: nvidia,tegra210-agic

  interrupt-controller: true

  "#address-cells":
    enum: [ 0, 1, 2 ]
  "#size-cells":
    enum: [ 1, 2 ]

Annotation

Atlas domain: Support Tooling And Documentation / Documentation.
Implementation status: atlas-only.
IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.