Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.yaml- Extension
.yaml- Size
- 3526 bytes
- Lines
- 138
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/interrupt-controller/arm-gic.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/fsl,ls-extirq.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale Layerscape External Interrupt Controller
maintainers:
- Shawn Guo <shawnguo@kernel.org>
description: |
Some Layerscape SOCs (LS1021A, LS1043A, LS1046A LS1088A, LS208xA,
LX216xA) support inverting the polarity of certain external interrupt
lines.
properties:
compatible:
oneOf:
- enum:
- fsl,ls1021a-extirq
- fsl,ls1043a-extirq
- fsl,ls1088a-extirq
- items:
- enum:
- fsl,ls1046a-extirq
- const: fsl,ls1043a-extirq
- items:
- enum:
- fsl,ls2080a-extirq
- fsl,lx2160a-extirq
- const: fsl,ls1088a-extirq
'#interrupt-cells':
const: 2
'#address-cells':
const: 0
interrupt-controller: true
reg:
maxItems: 1
description:
Specifies the Interrupt Polarity Control Register (INTPCR) in the
SCFG or the External Interrupt Control Register (IRQCR) in the ISC.
interrupt-map:
description: Specifies the mapping from external interrupts to GIC interrupts.
interrupt-map-mask: true
required:
- compatible
- '#interrupt-cells'
- '#address-cells'
- interrupt-controller
- reg
- interrupt-map
- interrupt-map-mask
allOf:
- if:
properties:
compatible:
contains:
enum:
- fsl,ls1021a-extirq
then:
properties:
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/arm-gic.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.