Documentation/devicetree/bindings/interrupt-controller/marvell,ap806-sei.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/interrupt-controller/marvell,ap806-sei.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/interrupt-controller/marvell,ap806-sei.yaml- Extension
.yaml- Size
- 1386 bytes
- Lines
- 59
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
Dependency Surface
dt-bindings/interrupt-controller/arm-gic.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/marvell,ap806-sei.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Marvell SEI (System Error Interrupt) Controller
maintainers:
- Miquel Raynal <miquel.raynal@bootlin.com>
description: >
Marvell SEI (System Error Interrupt) controller is an interrupt aggregator. It
receives interrupts from several sources and aggregates them to a single
interrupt line (an SPI) on the parent interrupt controller.
This interrupt controller can handle up to 64 SEIs, a set comes from the AP
and is wired while a second set comes from the CPs by the mean of MSIs.
properties:
compatible:
const: marvell,ap806-sei
reg:
maxItems: 1
interrupts:
maxItems: 1
'#interrupt-cells':
const: 1
interrupt-controller: true
msi-controller: true
required:
- compatible
- reg
- interrupts
- '#interrupt-cells'
- interrupt-controller
- msi-controller
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
interrupt-controller@3f0200 {
compatible = "marvell,ap806-sei";
reg = <0x3f0200 0x40>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
interrupt-controller;
msi-controller;
};
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/arm-gic.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.