Documentation/devicetree/bindings/interrupt-controller/marvell,cp110-icu.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/interrupt-controller/marvell,cp110-icu.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/interrupt-controller/marvell,cp110-icu.yaml- Extension
.yaml- Size
- 2374 bytes
- Lines
- 102
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/marvell,cp110-icu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
maintainers:
- Miquel Raynal <miquel.raynal@bootlin.com>
- Thomas Petazzoni <thomas.petazzoni@bootlin.com>
title: Marvell ICU Interrupt Controller
description:
The Marvell ICU (Interrupt Consolidation Unit) controller is responsible for
collecting all wired-interrupt sources in the CP and communicating them to the
GIC in the AP. The unit translates interrupt requests on input wires to MSG
memory mapped transactions to the GIC. These messages access different GIC
memory areas depending on their type (NSR, SR, SEI, REI, etc).
properties:
compatible:
const: marvell,cp110-icu
reg:
maxItems: 1
'#address-cells':
const: 1
'#size-cells':
const: 1
ranges: true
patternProperties:
"^interrupt-controller@":
type: object
description: Interrupt group child nodes
additionalProperties: false
properties:
compatible:
enum:
- marvell,cp110-icu-nsr
- marvell,cp110-icu-sr
- marvell,cp110-icu-sei
- marvell,cp110-icu-rei
reg:
maxItems: 1
'#address-cells':
const: 0
'#interrupt-cells':
const: 2
interrupt-controller: true
msi-parent:
maxItems: 1
description: Phandle to the GICP controller
required:
- compatible
- reg
- '#interrupt-cells'
- interrupt-controller
- msi-parent
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.