Documentation/devicetree/bindings/interrupt-controller/microchip,pic32mzda-evic.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/interrupt-controller/microchip,pic32mzda-evic.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/interrupt-controller/microchip,pic32mzda-evic.yaml- Extension
.yaml- Size
- 1604 bytes
- Lines
- 61
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/microchip,pic32mzda-evic.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Microchip PIC32 EVIC Interrupt Controller
maintainers:
- Cristian Birsan <cristian.birsan@microchip.com>
description: >
The Microchip PIC32 contains an Enhanced Vectored Interrupt Controller (EVIC).
It handles all internal and external interrupts. This controller exists
outside of the CPU and is the arbitrator of all interrupts (including
interrupts from the CPU itself) before they are presented to the CPU.
External interrupts have a software configurable edge polarity. Non external
interrupts have a type and polarity that is determined by the source of the
interrupt.
properties:
compatible:
items:
- const: microchip,pic32mzda-evic
reg:
maxItems: 1
interrupt-controller: true
'#interrupt-cells':
const: 2
interrupts:
maxItems: 1
microchip,external-irqs:
description:
External interrupts with software polarity configuration corresponding to
the INTCON SFR bits.
$ref: /schemas/types.yaml#/definitions/uint32-array
required:
- compatible
- reg
- interrupt-controller
- '#interrupt-cells'
additionalProperties: false
examples:
- |
interrupt-controller@1f810000 {
compatible = "microchip,pic32mzda-evic";
reg = <0x1f810000 0x1000>;
interrupt-controller;
#interrupt-cells = <2>;
microchip,external-irqs = <3 8 13 18 23>;
};
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.