Documentation/devicetree/bindings/interrupt-controller/renesas,r9a09g077-icu.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/interrupt-controller/renesas,r9a09g077-icu.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/interrupt-controller/renesas,r9a09g077-icu.yaml- Extension
.yaml- Size
- 8313 bytes
- Lines
- 237
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/interrupt-controller/arm-gic.hdt-bindings/clock/renesas,r9a09g077-cpg-mssr.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/renesas,r9a09g077-icu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas RZ/{T2H,N2H} Interrupt Controller
maintainers:
- Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
allOf:
- $ref: /schemas/interrupt-controller.yaml#
description:
The Interrupt Controller (ICU) handles software-triggered interrupts
(INTCPU), external interrupts (IRQ and SEI), error interrupts and DMAC
requests.
properties:
compatible:
oneOf:
- const: renesas,r9a09g077-icu # RZ/T2H
- items:
- enum:
- renesas,r9a09g087-icu # RZ/N2H
- const: renesas,r9a09g077-icu
reg:
items:
- description: Non-safety registers (INTCPU0-13, IRQ0-13)
- description: Safety registers (INTCPU14-15, IRQ14-15, SEI)
'#interrupt-cells':
description: The first cell is the SPI number of the interrupt, as per user
manual. The second cell is used to specify the flag.
const: 2
'#address-cells':
const: 0
interrupt-controller: true
interrupts:
items:
- description: Software interrupt 0
- description: Software interrupt 1
- description: Software interrupt 2
- description: Software interrupt 3
- description: Software interrupt 4
- description: Software interrupt 5
- description: Software interrupt 6
- description: Software interrupt 7
- description: Software interrupt 8
- description: Software interrupt 9
- description: Software interrupt 10
- description: Software interrupt 11
- description: Software interrupt 12
- description: Software interrupt 13
- description: Software interrupt 14
- description: Software interrupt 15
- description: External pin interrupt 0
- description: External pin interrupt 1
- description: External pin interrupt 2
- description: External pin interrupt 3
- description: External pin interrupt 4
- description: External pin interrupt 5
- description: External pin interrupt 6
- description: External pin interrupt 7
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/arm-gic.h`, `dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.