Documentation/devicetree/bindings/interrupt-controller/ti,irq-crossbar.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/interrupt-controller/ti,irq-crossbar.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/interrupt-controller/ti,irq-crossbar.yaml- Extension
.yaml- Size
- 2787 bytes
- Lines
- 97
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/ti,irq-crossbar.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments IRQ Crossbar
maintainers:
- Sricharan R <r.sricharan@ti.com>
description:
Some socs have a large number of interrupts requests to service the needs of
its many peripherals and subsystems. All of the interrupt lines from the
subsystems are not needed at the same time, so they have to be muxed to the
irq-controller appropriately. In such places a interrupt controllers are
preceded by an CROSSBAR that provides flexibility in muxing the device
requests to the controller inputs.
properties:
compatible:
const: ti,irq-crossbar
reg:
maxItems: 1
interrupt-controller: true
'#interrupt-cells':
const: 3
ti,max-irqs:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Total number of irqs available at the parent interrupt controller.
minimum: 1
ti,max-crossbar-sources:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Maximum number of crossbar sources that can be routed.
minimum: 1
ti,reg-size:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Size of a individual register in bytes. Every individual
register is assumed to be of same size.
enum: [1, 2, 4]
ti,irqs-reserved:
$ref: /schemas/types.yaml#/definitions/uint32-array
description:
List of the reserved irq lines that are not muxed using crossbar. These
interrupt lines are reserved in the soc, so crossbar bar driver should not
consider them as free lines.
ti,irqs-skip:
$ref: /schemas/types.yaml#/definitions/uint32-array
description:
Similar to "ti,irqs-reserved", but these are for SOC-specific hard-wiring
of those irqs which unexpectedly bypasses the crossbar. These irqs have a
crossbar register, but still cannot be used.
ti,irqs-safe-map:
$ref: /schemas/types.yaml#/definitions/uint32
description:
integer which maps to a safe configuration to use when the interrupt
controller irq is unused.
default: 0
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.