Documentation/devicetree/bindings/interrupt-controller/ti,pruss-intc.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/interrupt-controller/ti,pruss-intc.yaml

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Linux kernel
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Documentation/devicetree/bindings/interrupt-controller/ti,pruss-intc.yaml
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.yaml
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6059 bytes
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164
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Support Tooling And Documentation
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Documentation
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Support Tooling And Documentation: configuration, schema, or hardware description
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atlas-only

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Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/ti,pruss-intc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: TI PRU-ICSS Local Interrupt Controller

maintainers:
  - Suman Anna <s-anna@ti.com>

description: |
  Each PRU-ICSS has a single interrupt controller instance that is common
  to all the PRU cores. Most interrupt controllers can route 64 input events
  which are then mapped to 10 possible output interrupts through two levels
  of mapping. The input events can be triggered by either the PRUs and/or
  various other PRUSS internal and external peripherals. The first 2 output
  interrupts (0, 1) are fed exclusively to the internal PRU cores, with the
  remaining 8 (2 through 9) connected to external interrupt controllers
  including the MPU and/or other PRUSS instances, DSPs or devices.

  The property "ti,irqs-reserved" is used for denoting the connection
  differences on the output interrupts 2 through 9. If this property is not
  defined, it implies that all the PRUSS INTC output interrupts 2 through 9
  (host_intr0 through host_intr7) are connected exclusively to the Arm interrupt
  controller.

  The K3 family of SoCs can handle 160 input events that can be mapped to 20
  different possible output interrupts. The additional output interrupts (10
  through 19) are connected to new sub-modules within the ICSSG instances.

  This interrupt-controller node should be defined as a child node of the
  corresponding PRUSS node. The node should be named "interrupt-controller".

properties:
  $nodename:
    pattern: "^interrupt-controller@[0-9a-f]+$"

  compatible:
    enum:
      - ti,pruss-intc
      - ti,icssg-intc
    description: |
      Use "ti,pruss-intc" for OMAP-L13x/AM18x/DA850 SoCs,
                              AM335x family of SoCs,
                              AM437x family of SoCs,
                              AM57xx family of SoCs
                              66AK2G family of SoCs
      Use "ti,icssg-intc" for K3 AM65x, J721E and AM64x family of SoCs

  reg:
    maxItems: 1

  interrupts:
    minItems: 1
    maxItems: 8
    description: |
      All the interrupts generated towards the main host processor in the SoC.
      A shared interrupt can be skipped if the desired destination and usage is
      by a different processor/device.

  interrupt-names:
    minItems: 1
    maxItems: 8
    items:
      pattern: host_intr[0-7]
    description: |
      Should use one of the above names for each valid host event interrupt
      connected to Arm interrupt controller, the name should match the
      corresponding host event interrupt number.

Annotation

Implementation Notes