Documentation/devicetree/bindings/interrupt-controller/xlnx,intc.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/interrupt-controller/xlnx,intc.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/interrupt-controller/xlnx,intc.yaml- Extension
.yaml- Size
- 2117 bytes
- Lines
- 83
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/xlnx,intc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Xilinx Interrupt Controller
maintainers:
- Michal Simek <michal.simek@amd.com>
description:
The controller is a soft IP core that is configured at build time for the
number of interrupts and the type of each interrupt. These details cannot
be changed at run time.
properties:
compatible:
const: xlnx,xps-intc-1.00.a
reg:
maxItems: 1
clocks:
maxItems: 1
power-domains:
maxItems: 1
resets:
maxItems: 1
"#interrupt-cells":
const: 2
description:
Specifies the number of cells needed to encode an interrupt source.
The value shall be a minimum of 1. The Xilinx device trees typically
use 2 but the 2nd value is not used.
interrupt-controller: true
interrupts:
maxItems: 1
description:
Specifies the interrupt of the parent controller from which it is chained.
xlnx,kind-of-intr:
$ref: /schemas/types.yaml#/definitions/uint32
description:
A 32 bit value specifying the interrupt type for each possible interrupt
(1 = edge, 0 = level). The interrupt type typically comes in thru
the device tree node of the interrupt generating device, but in this case
the interrupt type is determined by the interrupt controller based on how
it was implemented.
xlnx,num-intr-inputs:
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 1
maximum: 32
description:
Specifies the number of interrupts supported by the specific
implementation of the controller.
required:
- reg
- "#interrupt-cells"
- interrupt-controller
- xlnx,kind-of-intr
- xlnx,num-intr-inputs
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.