Documentation/devicetree/bindings/iommu/qcom,apq8064-iommu.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/iommu/qcom,apq8064-iommu.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/iommu/qcom,apq8064-iommu.yaml- Extension
.yaml- Size
- 2035 bytes
- Lines
- 79
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/clock/qcom,mmcc-msm8960.hdt-bindings/interrupt-controller/irq.hdt-bindings/interrupt-controller/arm-gic.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iommu/qcom,apq8064-iommu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm APQ8064 IOMMU
maintainers:
- David Heidelberg <david@ixit.cz>
description:
The MSM IOMMU is an implementation compatible with the ARM VMSA short
descriptor page tables. It provides address translation for bus masters
outside of the CPU, each connected to the IOMMU through a port called micro-TLB.
properties:
compatible:
const: qcom,apq8064-iommu
clocks:
items:
- description: interface clock for register accesses
- description: functional clock for bus accesses
clock-names:
items:
- const: smmu_pclk
- const: iommu_clk
reg:
maxItems: 1
interrupts:
description: Specifiers for the MMU fault interrupts.
minItems: 1
items:
- description: non-secure mode interrupt
- description: secure mode interrupt (for instances which supports it)
"#iommu-cells":
const: 1
description: Each IOMMU specifier describes a single Stream ID.
qcom,ncb:
$ref: /schemas/types.yaml#/definitions/uint32
description: The total number of context banks in the IOMMU.
minimum: 1
maximum: 4
required:
- reg
- interrupts
- clocks
- clock-names
- qcom,ncb
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,mmcc-msm8960.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
iommu@7500000 {
compatible = "qcom,apq8064-iommu";
reg = <0x07500000 0x100000>;
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>,
Annotation
- Immediate include surface: `dt-bindings/clock/qcom,mmcc-msm8960.h`, `dt-bindings/interrupt-controller/irq.h`, `dt-bindings/interrupt-controller/arm-gic.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.