Documentation/devicetree/bindings/ipmi/aspeed,ast2400-kcs-bmc.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-kcs-bmc.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/ipmi/aspeed,ast2400-kcs-bmc.yaml
Extension
.yaml
Size
2800 bytes
Lines
110
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

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Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/ipmi/aspeed,ast2400-kcs-bmc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: ASPEED BMC KCS Devices

maintainers:
  - Andrew Jeffery <andrew@aj.id.au>

description: |
  The Aspeed BMC SoCs typically use the Keyboard-Controller-Style (KCS)
  interfaces on the LPC bus for in-band IPMI communication with their host.

properties:
  compatible:
    oneOf:
      - description: Channel ID derived from reg
        items:
          enum:
            - aspeed,ast2400-kcs-bmc-v2
            - aspeed,ast2500-kcs-bmc-v2
            - aspeed,ast2600-kcs-bmc

      - description: Old-style with explicit channel ID, no reg
        deprecated: true
        items:
          enum:
            - aspeed,ast2400-kcs-bmc
            - aspeed,ast2500-kcs-bmc

  interrupts:
    maxItems: 1

  reg:
    # maxItems: 3
    items:
      - description: IDR register
      - description: ODR register
      - description: STR register

  clocks:
    maxItems: 1

  aspeed,lpc-io-reg:
    $ref: /schemas/types.yaml#/definitions/uint32-array
    minItems: 1
    maxItems: 2
    description: |
      The host CPU LPC IO data and status addresses for the device. For most
      channels the status address is derived from the data address, but the
      status address may be optionally provided.

  aspeed,lpc-interrupts:
    $ref: /schemas/types.yaml#/definitions/uint32-array
    minItems: 2
    maxItems: 2
    description: |
      A 2-cell property expressing the LPC SerIRQ number and the interrupt
      level/sense encoding (specified in the standard fashion).

      Note that the generated interrupt is issued from the BMC to the host, and
      thus the target interrupt controller is not captured by the BMC's
      devicetree.

  kcs_chan:
    deprecated: true
    $ref: /schemas/types.yaml#/definitions/uint32
    description: The LPC channel number in the controller

Annotation

Implementation Notes